Product Engineer, Silicon Validation

About the Company

Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference.

Responsibilities

• Plan and execute comprehensive silicon characterization from first silicon through production release
• Lead test cost optimization efforts while maintaining quality standards
• Architect test flows to balance test time, coverage, and yield learning objectives
• Drive systematic yield improvement initiatives through data-driven root cause analysis
• Establish and track key quality metrics including DPPM and test escapes
• Perform die/package level bring-ups and troubleshoot failure modes
• Support OSAT bring-up and manage ATE/SLT manufacturing test program releases
• Productize test programs for seamless transition from engineering to high-volume manufacturing
• Analyze field return data and system-level failures to identify test coverage gaps
• Drive ATE-system correlation activities to ensure test program accuracy
• Manage relationships with test vendors, OSAT partners, and foundry partners

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
• 5-10+ years of hands-on experience in silicon validation, product engineering, and ATE test development
• Proven track record in yield optimization and DPPM reduction
• Experience with silicon characterization methodologies including Fmax/Vmin and power/thermal validation
• High-volume manufacturing test experience with production scale results
• Proficiency in yield and fail pareto analysis using JMP, Exensio, DataPower, or OptimalPlus
• Strong understanding of test program debugging and failure analysis correlation

Preferred Qualifications

• Experience with Advantest V93K platforms
• Experience managing wafer sort and final test across multiple advanced process nodes
• GPU, HPC, or AI accelerator chip testing background
• HBM or high-speed memory interface testing experience
• Experience leading NPI through high-volume production across multiple OSAT sites
• Scripting and automation skills in Python, Perl, or TCL

Benefits

• Medical, dental, and vision packages
• $500 per month credit for waiving medical benefits
• $2k per month housing subsidy for those living within walking distance
• Relocation support for San Jose
• Wellness benefits covering fitness and mental health
• Daily lunch and dinner in the office
• Unlimited compute budget subject to ROI justification