Principal Memory PHY Architect (Power Modeling)

Responsibilities

• Design and develop power-efficient memory PHY architectures.
• Drive the creation and optimization of effective power models for memory subsystems.
• Utilize industry-standard tools such as Power Artist and PTPX for power analysis and optimization.
• Collaborate with large cross-functional teams, including engineering and product management, to align requirements.
• Mentor engineers and share best practices within the team.
• Evaluate new technologies and architectural improvements to advance product competitiveness.
• Support IP integration and validation efforts.

Requirements

• 15+ years of experience in memory PHY architecture and power modeling.
• Expertise with industry-standard design and simulation tools, specifically Power Artist and PTPX.
• BSEE or MSEE degree.
• Strong digital and/or analog design skills.
• Proven ability to drive efficient power models and take ownership of project outcomes.
• Strong analytical and communication skills with the ability to work in large, multidisciplinary groups.

Benefits

• Comprehensive medical and healthcare plans.
• Paid time away through ETO and FTO programs.
• Family support including maternity/paternity leave and adoption assistance.
• Employee Stock Purchase Plan (ESPP) with a 15% discount.
• Competitive retirement plans and annual bonus eligibility.
• Equity and other discretionary bonuses.

About the Company

Synopsys is a global leader in electronic design automation (EDA), chip design, verification, and IP integration. Our technology is central to the Era of Pervasive Intelligence, empowering the creation of high-performance silicon chips that drive innovation in industries ranging from self-driving cars to machine learning.