Principal Engineer, Serdes Analog Design

Responsibilities

• Define architecture and circuits for Serdes projects
• Supervise designers to complete projects and conduct silicon validation
• Perform hands-on circuit design
• Translate component design specifications to schematics
• Build simulation test-benches to evaluate performance, power, and reliability
• Supervise and optimize layout to improve power consumption and performance

Requirements

• Bachelors with 20+ years, Masters with 18+ years, or PhD with 15+ years of experience
• Minimum 7+ years of experience in Analog/Serdes SoC design
• Expertise in analog/mixed-signal circuits (bandgap, LDO, filters)
• Experience with Serdes IP circuits (CTLE, DFE, FFE, clock distributions, PI, IQ generation)
• Knowledge of Serdes architecture and high-speed interconnect standards (USB, PCIe, UCIe)
• Proficiency with EDA tools (Cadence, Spectre, Totem, EMX)
• Proficiency in scripting languages (Python, Matlab)

Preferred Qualifications

• Experience with ESD, PLL, clock generation, ADC, and DAC

Benefits

• 4+ weeks of paid time off plus holidays and sick leave
• Medical, dental, and vision insurance
• 401k and incentive opportunities
• Charitable giving match
• Fertility care or adoption stipends
• Onsite café and gym