Principal Engineer - IP Verification

Responsibilities

• Evaluate and deploy evolving verification methodologies to handle complex IP and SubSystem designs
• Own and ensure quality adherence throughout all stages of the project cycle to achieve "Zero Defect" results
• Develop testbenches and testplans to ensure thorough functional verification and performance traceability
• Drive technological innovations within the team environment
• Collaborate with Systems, Design, DFT, and Mixed Signal teams to address verification challenges via simulation, hardware modeling, and formal verification

Requirements

• 10-15 years of experience in IP or Sub-system verification on multimillion-gate complex designs
• Proficiency in High-Level Verification Languages (HVL) such as UVM, SystemVerilog, or C++
• Strong working knowledge of Hardware Description Languages (HDL) including Verilog or VHDL
• Experience with ARM cores and AMBA/AXI/AHB protocols
• Hands-on experience with simulation tools such as VCS, Questa, or NCSim
• Deep understanding of formal verification methodology, SVA, functional coverage, and regression management

Preferred Qualifications

• Experience in automotive Graphics, Vision accelerators, or High-Speed Serial IP controllers
• Knowledge of networking protocols such as Ethernet
• Exposure to pre-silicon validation or emulation

About the Company

NXP Semiconductors enables a smarter, safer, and more sustainable world through innovation. As a global leader in secure connectivity solutions for embedded applications, NXP pushes boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets.