Principal Engineer - IP Verification

Responsibilities

• Evaluate and deploy evolving verification methodologies to handle complex IP and Sub-System designs within aggressive schedules
• Own and ensure quality adherence throughout the entire project cycle to achieve "Zero Defect" IP/Sub-Systems
• Develop testbenches and testplans to ensure thorough functional verification, performance assessment, and feature traceability
• Drive technological innovations within the team and influence verification processes
• Collaborate with local and remote multi-site teams, including Systems, Design, DFT, and Mixed Signal groups
• Manage end-to-end IP verification project cycles, including testbench strategies, development, and simulation debugging

Requirements

• 10-15 years of experience in IP or Sub-system verification on multimillion-gate complex designs
• Strong working knowledge of Hardware Verification Languages (HVLs) such as UVM, SystemVerilog, and C++
• Proficiency in Hardware Description Languages (HDLs) including Verilog or VHDL
• Extensive experience with simulation tools such as VCS, Questa, NCSim, or ModelSim
• Deep understanding of microcontroller architecture, ARM cores, and protocols like AHB, AMBA, and AXI
• Experience with memory interfaces (Flash, SRAM, DDR) and memory controllers
• Strong knowledge of formal verification methodology, SVA (SystemVerilog Assertions), functional coverage, and regression management

Preferred Qualifications

• Experience in automotive domains, graphics/vision accelerators, or high-speed serial IP controllers
• Knowledge of networking protocols such as Ethernet
• Exposure to pre-silicon validation or emulation environments

About the Company

NXP Semiconductors enables a smarter, safer, and more sustainable world through innovation. As a world leader in secure connectivity solutions for embedded applications, NXP pushes boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets.