Principal Engineer- HIG HBM Layout

Responsibilities

• Lead end-to-end layout execution for analog, mixed-signal, and custom digital blocks and full-chip integration for HBM products.
• Own full-chip technical decisions regarding analog, digital, memory, ESD, and EM/IR to ensure optimal PPA (Power, Performance, and Area).
• Drive project planning, including area/time estimation, scheduling, task delegation, and milestone tracking for multiple concurrent programs.
• Oversee layout verification activities including LVS, DRC, and Antenna checks to ensure high-quality delivery.
• Lead and mentor the layout team, conducting design reviews and guiding junior engineers on sub-block execution.
• Drive innovation through the adoption of AI and automation to improve turnaround time and layout quality.
• Collaborate with global cross-functional teams including Design, Verification, IP, and Packaging.

Requirements

• 15+ years of experience in analog/custom layout using advanced CMOS processes.
• 4+ years of experience in team development and project leadership.
• Proven track record of leading multiple projects through successful Tape-out.
• Expertise in Cadence VLE/VXL and Calibre DRC/LVS.
• Strong skills in floor planning, manual routing, and layout design for critical blocks (e.g., PLLs, ADCs, DACs, LDOs).
• BE or MTech in Electronic or VLSI Engineering.
• Excellent verbal and written communication skills with the ability to work in multi-site, multi-time zone environments.

About the Company

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence. We deliver a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products that fuel the data economy and enable advances in artificial intelligence and 5G applications.