Principal Engineer, Design Verification

Responsibilities

• Define and own verification strategy and methodology using UVM and SystemVerilog at IP, subsystem, and SoC levels
• Interpret Ethernet and related protocol specifications to create comprehensive verification plans, assertions, and test scenarios
• Architect scalable verification environments, reusable VIPs, and checkers
• Drive coverage-driven verification, including functional, code, and assertion coverage
• Lead bug triage, root-cause analysis, and closure across all design levels
• Validate performance, stress, and corner scenarios such as congestion and error injection
• Mentor and technically guide verification engineers across various experience levels
• Collaborate with architecture, RTL, DFT, firmware, and software teams to ensure first-pass silicon success

Requirements

• Bachelor's or Master's degree in Electrical/Electronics Engineering or a related field
• 10+ years of experience in ASIC/SoC design verification
• Strong hands-on expertise in SystemVerilog, UVM, and SVA
• Deep understanding of Ethernet architecture and protocols (MAC, PCS, PHY interfaces)

About the Company

Analog Devices, Inc. (ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. We combine analog, digital, AI, and software technologies into solutions that combat climate change, connect humans and the world, and drive advancements in automation, mobility, healthcare, and data centers.