Principal Engineer - Design

Responsibilities

• Lead architecture and micro-architecture definition for complex IPs, subsystems, or full-chip designs
• Drive end-to-end RTL design execution from concept through synthesis, sign-off, and silicon bring-up
• Serve as a technical authority for digital design, ensuring high standards in quality, performance, power, and area (PPA)
• Resolve complex, cross-domain design and EDA tool challenges
• Collaborate with verification, physical design, DFT, and product teams to ensure robust delivery
• Guide low-power, high-performance design strategies for data center workloads
• Influence protocol and platform roadmap decisions for PCIe, CXL, NVMe, and SAS
• Mentor and technically guide engineers through architectural reviews and design direction

Requirements

• 11+ years of experience in ASIC or SoC digital design
• Bachelor's degree in Electronics or Electrical Engineering
• Strong expertise in SystemVerilog RTL design and micro-architecture development
• Proven success delivering multiple complex tape-outs in high-performance silicon
• Deep hands-on experience with Lint, CDC, formal verification, logic synthesis, and static timing analysis
• Mandatory knowledge of DFT, including scan, testability, and DFT sign-off interactions
• Proficiency in scripting languages such as Tcl, Perl, or Awk
• Hands-on experience with high-speed protocols such as PCIe, CXL, NVMe, or SAS/SATA

Preferred Qualifications

• Hands-on experience with Cadence-based ASIC design environments

About the Company

Microchip Technology Inc. is a leading semiconductor company that designs technology that powers the world. Our Data Center Solutions business unit delivers high-performance silicon used by leading server and storage OEMs and hyperscale data centers, enabling workloads ranging from cloud and big data storage to AI/ML acceleration.