Principal Engineer, DDR/LPDDR/PHY Systems

Responsibilities

• Lead verification and validation efforts for advanced DDR, LPDDR, and HBM memory interface PHY and controller solutions
• Develop and optimize embedded firmware to support PHY initialization, training, debug, and system performance
• Create and enhance verification environments using UVM, System Verilog, and system-level modeling tools
• Collaborate with analog, digital, firmware, and hardware teams to debug complex issues and ensure system integrity
• Bridge pre-silicon and post-silicon activities to improve bring-up efficiency and debug effectiveness
• Support silicon bring-up by developing tests and analyzing failures in FPGA or emulation environments
• Mentor engineers and contribute to best practices in verification, debug, and development workflows

Requirements

• 15+ years of experience in verification, firmware, ASIC/SoC development, or system validation
• Deep knowledge of DDR, LPDDR, HBM, MRDIMM, DFI, or related memory interface protocols
• Strong experience with UVM-based verification environments and System Verilog
• Experience debugging complex issues across firmware, digital design, and silicon bring-up
• Proficiency in scripting languages such as Python, Perl, Shell, or C++ for automation
• Solid understanding of high-speed interface PHY architecture and system-level validation
• Strong analytical, problem-solving, and cross-functional leadership skills

Benefits

• Comprehensive medical and healthcare plans
• Paid time away including ETO and FTO programs
• Family support including maternity, paternity, and adoption assistance
• Employee Stock Purchase Plan (ESPP) with a 15% discount
• Competitive salaries and regional retirement plans

About the Company

Synopsys is a global leader in chip design, verification, and IP integration. Our technology is central to the era of pervasive intelligence, empowering the creation of high-performance silicon and software that shape the way we live and connect.