Principal Engineer, Automated Derivatives

Responsibilities

• Lead the end-to-end delivery of derivative SoCs by building an AI-augmented "Silicon Factory" that bridges RTL design, functional verification, and physical implementation.
• Develop physical-aware RTL using ML-based predictors to evaluate timing and congestion bottlenecks before synthesis.
• Automate the creation of RTL wrappers, memory maps, and bus interconnects for design variants using scripts and Generative AI.
• Build AI-driven verification environments that automatically adjust constraints and coverage goals for design derivatives.
• Implement smart regression management using ML to prioritize test cases and identify bug-prone modules.
• Drive rapid physical implementation by using AI to automate floorplan constraints and accelerate convergence through design reuse.

Requirements

• Master’s degree in Electrical Engineering, Computer Science, or Computer Engineering.
• 12–15 years of professional experience in the semiconductor industry.
• Proficiency in SystemVerilog for RTL design and UVM for functional verification.
• Solid understanding of Synthesis, P&R, and STA (Static Timing Analysis).
• Expert Python skills for building and deploying models that interface with simulation and implementation tools.
• Experience using Tcl and Python to extract data from simulation logs and implementation reports.
• Mastery of Git and CI/CD pipelines (Jenkins/GitLab) for high-velocity design deployment.

About the Company

Renesas is an embedded semiconductor solution provider driven by its purpose "To Make Our Lives Easier." As a leading expert in embedded processing, Renesas provides scalable semiconductor solutions for the automotive, industrial, infrastructure, and IoT industries. With a diverse global team, we design sustainable, power-efficient solutions that help communities thrive.