Principal AMS Verification Engineer

Responsibilities

• Own and drive the end-to-end AMS verification strategy for high-speed SerDes IPs from concept to signoff
• Architect and develop UVM and UVM-AMS based verification environments
• Verify complex mixed-signal SerDes subsystems across IP, subsystem, and SoC levels
• Develop, integrate, and validate RNM, Verilog-AMS, and behavioral models
• Lead verification of link training, initialization, multi-lane operation, and robustness scenarios
• Analyze and debug complex mixed-signal issues involving timing, jitter, noise, and protocol behavior
• Drive functional, assertion-based, and coverage-driven verification
• Mentor and technically guide junior verification engineers
• Collaborate with analog design, digital RTL, architecture, and validation teams

Requirements

• 10+ years of experience in AMS and mixed-signal verification
• Strong hands-on experience with SystemVerilog, UVM, and UVM-AMS
• Expertise in Verilog-AMS, AMS RNM, or wreal modeling
• Experience with mixed-signal simulators such as Cadence Xcelium AMS, Synopsys VCS AMS, or Siemens Questa ADMS
• Deep understanding of high-speed SerDes architectures (TX/RX data paths, PLLs, CDRs, Equalization)
• Experience verifying SerDes protocols, specifically USB and DisplayPort
• Proficiency in Python, Perl, or Tcl for automation of regression flows and reporting
• Bachelor’s or Master’s degree in Electrical or Electronics Engineering

About the Company

NXP Semiconductors enables a smarter, safer, and more sustainable world through innovation. As a world leader in secure connectivity solutions for embedded applications, NXP pushes boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets.