Physical Design Intern

Responsibilities

• Realize front-end designs in silicon and help improve iteration speed to final signoff
• Develop and run Physical Design flows to synthesize blocks
• Automate final design checks and advise RTL design decisions

Requirements

• Progress toward a Bachelor’s, Master’s, or PhD in electrical engineering, computer engineering, or related field
• Familiarity with high-speed digital logic and ASIC or SoC design concepts
• Familiarity with SystemVerilog, UVM, or Python
• Familiarity with verification work, writing test benches, and physical design flows
• Ability to learn quickly about transformers and modern artificial intelligence

Preferred Qualifications

• Familiarity with modern ML and LLM model architectures
• Familiarity with numerical representations and functions (RTL)
• Familiarity with clocking and reset schemes (RTL/PD)
• UVM or formal verification experience (DV)
• Ability to program with Python or another scripting language

Benefits

• 12-week paid internship with generous housing support for relocating interns
• Daily lunch and dinner provided in the San Jose office
• Direct mentorship from industry leaders and world-class engineers

About the Company

Etched builds hardware for frontier intelligence, co-designing chips, racks, software, and manufacturing to deliver best-in-class throughput and latency for AI inference. The company is backed by top-tier investors and staffed by leading engineers. Etched is a fully in-person team based in San Jose, with no boundaries between engineering and research.