Physical Design Engineer

About the Company

OLIX is building the next generation of AI infrastructure. The OLIX Decode Accelerator 1 (DX-1) is the first accelerator architected specifically for decode, utilizing rack-scale co-design of logic, data movement, packaging, optics, and interconnect to enable a step change in system-level performance.

Responsibilities

• Architect, own, and implement digital control solutions to support high-performance analog subsystems
• Develop customized physical design solutions including low-power/low-skew clock distribution networks
• Implement power grid solutions customized to unique analog subsystem floorplan requirements
• Manage multi-voltage-domain design flows to support different power rails
• Perform timing analysis for interfaces with the analog subsystem
• Execute DRC/LVS/ERC validation and closure of advanced-node processes
• Collaborate with the DFT team to implement customized DFT flows

Requirements

• 7+ years of hands-on experience with architecture, implementation, and verification of Physical Design for high-performance ASICs or SoCs
• Proven success implementing and verifying physical design of high-frequency designs in advanced process nodes
• Proficiency in Python or TCL scripting for PD flow automation
• Strong communication and cross-functional collaboration abilities

Preferred Qualifications

• Tape-out experience with process nodes at 7nm or below
• Familiarity with high-speed IO solutions like PCIe SerDes PHY solutions
• Familiarity with ESD requirements of advanced node processes