Physical Design Engineer

Responsibilities

• Perform physical design tasks including synthesis, place and route, timing, and block closure/sign-off
• Work closely with RTL teams to optimize for physical design and full-chip integration
• Execute block-level and full-chip physical verification methodology
• Optimize designs for the best possible power, performance, and area (PPA)
• Resolve complex DRC, LVS, and IR/EM analysis issues
• Enhance physical design flows through scripting and automation

Requirements

• 7+ years of physical design and verification experience
• Strong experience in block and subsystem timing closure
• Expert proficiency with ICV or Calibre tools for resolving DRC and LVS issues
• Expertise in IR/EM analysis and resolution
• Strong scripting skills in Tcl and Python
• Deep understanding of full-chip floor-planning and integration
• Experience with the complete physical design flow and Synopsys tool suite

About the Company

Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, delivering industry-leading training and inference speeds for top model labs, global enterprises, and cutting-edge AI-native startups.