Packaging Engineer (Substrate Design and Layout)

Responsibilities

• Optimize die bonding pad, flip chip die plot, and substrate layout to reduce cost for ASIC and SiP packaging solutions
• Support development of advanced packaging technologies including standalone ASIC, MCM FCBGA, and 2.5D
• Conduct substrate layout feasibility studies and die fitment analysis
• Maintain design libraries and generate accurate bonding diagrams
• Collaborate with hardware, assembly, and packaging engineering teams globally
• Interface with assembly houses and substrate vendors for design reviews and manufacturability

Requirements

• Master’s or Bachelor’s degree in Materials Science, Electrical/Electronics Engineering, or related field
• Up to 2 years of design experience in semiconductor packaging or substrate design
• Proficiency in EDA tools such as Cadence SIP/Allegro, AutoCAD, CAM, and Valor
• Solid understanding of flip chip and substrate-based manufacturing processes
• Strong communication skills for cross-functional and global collaboration

Preferred Qualifications

• Familiarity with advanced packaging technologies like FCBGA, MCM, or 2.5D designs
• Experience with substrate fabrication and manufacturing workflows

About the Company

Sandisk delivers innovative Flash and advanced memory technologies that power the digital world. Recognized for groundbreaking innovation and manufacturing excellence, Sandisk provides essential solutions for the global supply chain.