Packaging Engineer

Responsibilities

• Optimize die bonding pad, flip chip die plot, and substrate layout to reduce cost for ASIC and SiP packaging solutions
• Support development and integration of new planform packaging technologies and NAND generations
• Conduct substrate layout feasibility studies and die fitment analysis
• Maintain design libraries and generate accurate bonding diagrams
• Collaborate with hardware, assembly, and packaging engineering teams globally
• Interface with assembly houses and substrate vendors for design reviews and manufacturability
• Support the development of department automation systems

Requirements

• Master’s or Bachelor’s degree in Materials Science, Electrical/Electronics Engineering, or related disciplines
• Up to 5 years of design experience in semiconductor packaging or substrate design
• Proficiency in EDA tools including Cadence SIP/Allegro, AutoCAD, CAM, and Valor
• Solid understanding of advanced packaging processes like wire bonding and flip chip
• Fluent or upper-intermediate English communication skills

Preferred Qualifications

• Familiarity with WB version design
• Experience with advanced packaging technologies such as FCBGA, MCM, or 2.5D designs

About the Company

Sandisk delivers innovative Flash and advanced memory technologies that power the digital world. Recognized for groundbreaking innovation and manufacturing excellence, Sandisk provides essential solutions for the global supply chain.