Network Processor IP Verification Sr Lead Engineer

Responsibilities

• Plan, design, and implement verification strategies and testbench architectures using SV/UVM/C
• Lead digital design verification in close collaboration with multi-site teams across the US, India, and other global locations
• Develop verification environments and testbench components, including BFMs and checkers
• Conduct high, mid, and low-level verification reviews, coverage closure, and sign-off on block and sub-system testing
• Perform power-aware verification on RTL and gate-level netlists
• Lead junior engineers and drive project planning and tracking
• Assist SoC teams with IP integration testing and conduct post-silicon debugs in collaboration with Design, Validation, and SW teams

Requirements

• 5-8 years of strong experience in digital front-end ASIC design verification
• Expertise in RTL verification using C, SystemVerilog, and UVM for complex designs with multiple clock and power domains
• Strong coding skills in SystemVerilog and UVM
• Proficiency in scripting languages such as Perl or Python for test automation frameworks
• Deep understanding of code and functional coverage reports, including identifying coverage holes and developing new tests
• Bachelor's or Master's degree in Electronics, VLSI, Communications, or a related engineering field

Preferred Qualifications

• Experience with Formal Verification using Jasper, VCF, etc.
• Experience in low power verification methodology and clock domain crossing (CDC) designs
• Familiarity with bus protocols such as AHB and AXI
• Experience in Modem/Wireless IP verification (NR, LTE, WCDMA, CDMA, WLAN, Bluetooth)
• Experience in post-Si debug

About the Company

Qualcomm is a leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drive digital transformation for a smarter, connected future.