Micro-architect/Logic Designer, Coherent Interconnect

Responsibilities

• Lead the micro-architecture development of custom coherent interconnect IP and last level cache (LLC) blocks.
• Drive the timely development of RTL design, ensuring performance and power optimization (PPA).
• Partner with system architects to define next-generation Samsung coherent interconnects and LLC.
• Perform micro-architecture research and specification from high-level exploration to detailed design.
• Collaborate with verification, implementation, and physical design teams to achieve timing, area, and functionality goals.
• Mentor junior engineers within the team.

Requirements

• 10+ years of experience with a Bachelor’s degree, 8+ years with a Master’s, or 6+ years with a PhD in Computer Science, Computer Engineering, or a related field.
• Strong background in RTL design for coherent interconnects, memory controllers, or LLC for high-performance digital designs.
• Deep expertise in Verilog and the ASIC design flow (synthesis, prototyping, DFT, timing analysis, etc.).
• Knowledge of Arm AMBA5 CHI, AMBA4 ACE, or AXI coherent interconnect and bus protocols.
• Understanding of system caches, directory snoop filter protocols, and on-chip network topologies (mesh, ring, crossbar).
• Strong communication and interpersonal skills for working in a dynamic, global team.

Preferred Qualifications

• Proficiency in scripting languages such as Perl or Python.
• Experience with Verilog/VHDL, STA, DFT, and ECO flows.
• Advanced knowledge of memory subsystem design and coherency protocols.

Benefits

• Competitive base pay range ($151,000 - $251,800 depending on experience and location).
• Comprehensive medical, dental, and vision insurance.
• 401(k) and life insurance.
• Free onsite lunch and wellness incentives.
• Tuition assistance and student loan programs.
• Paid time off and MBO bonus compensation.

About the Company

Samsung Electronics is a global leader in technology and semiconductor innovation. Through the Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), we build high-performance Intellectual Property (IP) applied to computing devices consumed by millions of people worldwide.