Member of Technical Staff, Performance Modeling

Responsibilities

• Build and maintain system-level performance models for rack-scale ML infrastructure with custom silicon components
• Evaluate end-to-end value proposition on ML workloads and translate model outputs into actionable guidance
• Work with silicon architects, system designers, and workload owners to align performance expectations
• Identify performance bottlenecks, scaling limits, and sensitivity points across compute, memory, and interconnects
• Communicate modeling assumptions, limitations, and conclusions to technical and non-specialist stakeholders

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a closely related field
• Deep understanding of ML systems including workload sharding, KV caching, and attention optimizations
• 5–10+ years of experience in performance modeling for computer architectures, accelerators, or high-performance networking
• Ability to learn new ML architectures quickly and build performance models for them
• Ability to reason across multiple abstraction layers from architectural details to system-level behavior

Preferred Qualifications

• PhD in Computer Science, Electrical Engineering, or a related field
• Prior experience modeling performance for ML accelerators or ML systems
• Familiarity with shared memory systems and frameworks such as CUDA VMM
• Experience with scale-up and high-bandwidth interconnects like NVLink

Benefits

• Competitive salary including base salary, performance-based bonus, and early stage equity grant
• Comprehensive health, dental, vision, and life insurance
• Relocation assistance and visa sponsorship
• Daily lunch stipend and 401k match