LEC CAD Engineer, Staff

Responsibilities

• Own and drive the end-to-end LEC flow, including RTL-to-gate, gate-to-gate, and ECO verification runs.
• Debug and resolve Non-Equivalences (NEQs), aborts, and unmapped points across complex SoC subsystems.
• Develop and maintain LEC automation infrastructure and scripts using Tcl, Perl, Python, or Shell.
• Collaborate with synthesis engineers to integrate LEC into the synthesis flow using Cadence and Synopsys interfaces.
• Support Power-Aware Formal Verification (PA-FV) using UPF/CPF-based flows.
• Evaluate and qualify new EDA tool versions and features from Cadence and Synopsys vendors.
• Mentor junior and senior engineers on LEC methodology and debug techniques.

Requirements

• 8+ years of hands-on experience in ASIC/SoC CAD engineering with a focus on formal verification and LEC.
• Deep expertise in Cadence Conformal LEC (RTL-to-gate, gate-to-gate, ECO verification).
• Strong hands-on experience with Synopsys Formality.
• Strong understanding of ASIC design flows from RTL synthesis through GDS, including synthesis, place & route, and ECO flows.
• Proficiency in scripting languages such as Tcl, Perl, Python, and/or Shell (Bash/CSH).
• Experience with Power-Aware LEC / Conformal Low Power (CLP) using UPF/CPF.
• Bachelor's degree in Electrical Engineering, Computer Engineering, VLSI & Embedded Systems, or equivalent.

Preferred Qualifications

• Master's degree in Electrical Engineering, Computer Engineering, or VLSI & Embedded Systems.
• Experience with Sequential Equivalence Checking (SEC) tools such as Cadence JasperGold or Synopsys VC Formal.
• Familiarity with RTL languages including SystemVerilog, Verilog, or VHDL.
• Knowledge of DFT (Design for Test) constraints and their impact on LEC flows.

About the Company

Qualcomm is a global leader in wireless technology, developing the foundational innovations that power the world's most advanced mobile and connected devices. We hire the brightest minds to solve the most complex challenges in semiconductor and wireless engineering.