Lead IP Verification Engineer

Responsibilities

• Plan, build, and execute verification of new and existing features for Soft IP cores
• Develop comprehensive verification strategies including test plans, functional coverage models, and assertion-based verification
• Build test plan documentation covering parameter space, platform interactions, and end-user use cases
• Develop directed and constrained-random verification tests
• Drive verification closure using coverage metrics and bug convergence
• Debug complex design and verification issues spanning digital and firmware interfaces
• Drive adoption of UVM methodology, SystemVerilog best practices, and CI/CD verification flows
• Maintain and improve nightly regression infrastructure across supported platforms

Requirements

• 7+ years of industry experience in IP/SoC level design verification
• Proficiency in IP-level ASIC or FPGA functional verification
• Proficiency in debugging RTL using tools like Questa, Xcelium, VCS, or Vivado
• Strong hands-on experience with SystemVerilog and UVM frameworks
• Experience with Assertion-based verification (SVA, PSL)
• Experience with functional and code coverage closure
• Proficiency in scripting languages such as Python, Perl, shell, or Makefile
• Bachelor's or Master's degree in Computer Engineering or Electrical Engineering

Preferred Qualifications

• Experience with formal verification tools and methodologies
• Experience developing verification frameworks and CI/CD pipelines
• Exposure to AI-assisted verification tools and automation frameworks
• Experience with high-speed interface protocols (HDMI, DisplayPort, USB, PCIe, Ethernet, DDR4/5)
• Knowledge of on-chip interconnects like AXI, AHB, or APB
• Experience with simulation acceleration and SerDes/PHY-level protocol verification

About the Company

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems.