Layout Engineer, Senior

Responsibilities

• Develop block, macro, or chip-level layouts and floorplans based on project requirements, specifications, and design schematics
• Apply design manuals, established processes, and electronic principles to create accurate designs
• Conduct analyses, tests, and verification to identify and troubleshoot design issues
• Utilize various tools and techniques to stay current with new verification methods
• Collaborate with internal and external stakeholders to align on projects and resolve technical issues

Requirements

• Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or a related field
• 3+ years of experience in custom layout design (e.g., analog, mixed-signal, RF, or digital design)
• Proficiency with layout design and verification tools such as Cadence, LVS, and rmap
• Expertise in FinFET layouts, specifically for TSMC 7nm nodes and below
• Solid experience (5-10 years) in developing high-speed IO, ESD, or Analog layout designs
• Knowledge of SKILL or PERL scripting
• Ability to work effectively with global engineering teams and manage contract workforce tasks

About the Company

Qualcomm is a global leader in wireless technology, developing breakthrough innovations that impact lives around the world. We foster a supportive, inclusive culture where the brightest minds work together to solve the most complex challenges in engineering and technology.