Layout Engineer, Lead

Responsibilities

• Develop block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics
• Apply understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs
• Conduct analyses, tests, and verifies designs using different tools and techniques to identify and troubleshoot issues
• Work with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues

Requirements

• Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field with 3+ years of experience
• OR Associate's degree with 5+ years of experience
• OR High School diploma with 7+ years of experience
• 3+ years of experience using layout design and verification tools (e.g., Cadence, LVS, rmap)
• 6 to 9 years of expertise in high speed / Analog / Mixed signal layouts in lower nodes
• Sound knowledge and hands-on experience in FinFet technology, layout design, and DRC limitations
• Proficiency in Cadence Virtuoso layout XL / GXL and Calibre physical verification flow
• Ability to lead projects independently and communicate effectively with global engineering teams

Preferred Qualifications

• Scripting knowledge in Skill, Perl, and Shell

About the Company

Qualcomm is a global leader in wireless technology, developing breakthrough innovations that impact lives around the globe.