IP/Subsystem Verification Lead

Responsibilities

• Collaborate with architects, hardware engineers, and firmware engineers to understand new features for PCIe and CXL based IPs
• Develop comprehensive test plan documentation, accounting for hardware, firmware, and software driver use cases
• Code IP or subsystem level UVM-based testbenches, including monitors, scoreboards, and checkers
• Build directed and random verification tests to ensure design quality
• Run regressions and debug test failures to ensure high functional, performance, and implementation quality

Requirements

• 8-10 years of experience in ASIC verification
• Expertise in PCIe, CXL, or Ethernet protocols
• Proficiency in Verilog and SystemVerilog
• Expertise in developing UVM-based verification frameworks and testbenches
• Strong knowledge of Object Oriented Programming (OOP)
• Proficiency in Python or Perl scripting for automation
• Bachelor's or Master's degree in Computer Engineering or Electrical Engineering

Preferred Qualifications

• Experience with leadership or mentorship roles
• Experience working through the full ASIC/FPGA project lifecycle from planning to tape-out
• Exposure to simulation profiling, efficiency improvement, and acceleration tools
• Knowledge of computer architecture and complex systems
• Exposure to generative AI or simulation tools for testbench and assertion generation

About the Company

AMD is a global leader in high-performance computing, graphics, and visual computing technologies. Our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers to PCs, gaming, and embedded systems. We strive for execution excellence through a culture of innovation, collaboration, and inclusion.