IP Design Verification Engineer

Responsibilities

• Design and maintain UVM-based verification environments for high-speed serial IP blocks and security IP
• Develop comprehensive test plans and coverage models covering protocol corner cases and security threat scenarios
• Create reusable UVM components including agents, drivers, monitors, scoreboards, and protocol checkers
• Implement constrained-random traffic generators with error-injection and latency-stress capabilities
• Integrate formal verification and assertion-based checking (SVA) to capture protocol and timing violations
• Run and maintain regression suites on industry-standard simulators and monitor functional and security coverage
• Collaborate with design and architecture teams to resolve bugs and drive design for testability
• Mentor junior engineers and contribute to the IPD verification methodology library

Requirements

• 5-6 years of hands-on verification experience with complex IP
• Expertise in SystemVerilog, UVM, and Formal Verification
• Practical experience verifying high-speed serial protocols such as PCIe or Ethernet SERDES
• Familiarity with security IP verification, including cryptographic engines and secure-boot flows
• Proficiency with simulation tools such as VCS, Xcelium, or Questa
• Strong scripting skills in Tcl or Python for test bench generation and regression management
• B.E., B.Tech, or M.Tech in Electrical or Computer Engineering

About the Company

Samsung Semiconductor India Research (SSIR) is a major R&D center for Samsung Electronics, focusing on cutting-edge technologies including System LSI, Memory, Foundry, and AI/ML solutions. Our engineers work on diverse, high-impact projects ranging from Mobile SoCs to 5G/6G solutions and Neural processors in a highly innovative environment.