Hardware Tools Engineer

Responsibilities

• Build and improve software tooling for compilation, IR transforms, RTL generation, simulation, debug, and automation
• Extend and integrate hardware compiler stacks including frontends, IR passes, lowering, and codegen to Verilog/SystemVerilog
• Improve developer experience through reproducible builds, better error messages, and dependable CI/regression infrastructure
• Collaborate with designers and verification engineers to solve real engineering friction
• Read and reason about Verilog/SystemVerilog to debug issues and validate tool output
• Build analysis and automation around PPA optimization loops (area, timing, and power)

Requirements

• Demonstrated ability to build and maintain software via projects, research, or professional experience
• Strong CS fundamentals in data structures, algorithms, and software design
• Proficiency in Rust, C++, or Python
• Familiarity with digital design concepts and ability to read RTL (Verilog/SystemVerilog)
• Familiarity with compiler or IR-based concepts such as representations, passes, and transformations
• Ability to operate in ambiguity and iterate quickly

Preferred Qualifications

• Exposure to compiler/hardware toolchains like LLVM, MLIR, Chisel, or XLS/DSLX
• Experience with Verilog tooling ecosystems such as Yosys, Verilator, or Slang
• Experience with build and test infrastructure like Bazel or CI systems
• Prior work in synthesis, place and route, or static timing analysis

About the Company

OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity.