GPU PD Engineer

Responsibilities

• Perform physical implementation activities for high-performance GPU cores, including floor-planning, place and route, CTS, and timing closure
• Execute formal verification and physical verification (DRC/LVS), PDN, and power optimization
• Drive timing convergence for high-frequency, data-path intensive cores using advanced STA concepts
• Manage block-level PnR convergence using Synopsys ICC2 or Cadence Innovus
• Collaborate closely with design, DFT, and PNR teams to resolve issues regarding constraints validation, verification, and STA
• Handle technical deliverables and work towards project milestones within a team environment

Requirements

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or a related field with 4+ years of hardware engineering experience (or Master's with 3+ years, or PhD with 2+ years)
• Strong expertise in physical implementation and PPA (Power, Performance, Area) trade-off decisions
• Proficiency with Synopsys ICC2 or Cadence Innovus
• Experience with timing convergence tools such as PTSI or Tempus in latest technology nodes
• Strong understanding of clocking architecture
• Proficiency in Tcl or Perl scripting
• Excellent problem-solving and communication skills

About the Company

Qualcomm is a global leader in wireless technology, developing breakthrough innovations that impact lives around the world. We hire the brightest minds and foster a supportive, inclusive culture where your ideas contribute to world-changing technologies.