Director of System Validation Engineering

Responsibilities

• Understand performance and functionality requirements for ICs in Data Center systems for AI and ML applications
• Own the development and execution of a comprehensive validation plan
• Devise test automation for ICs and board products using a data-centric approach
• Design experiments to root-cause unexpected behavior and report specification compliance
• Engage directly with key customers to understand requirements and highlight solution capabilities

Requirements

• Bachelor's degree in electrical or computer engineering (Master's preferred)
• 12+ years experience with complex SoC/silicon products for Server, Storage, or Networking
• 3+ years of experience leading engineering teams
• 5+ years of hands-on experience with Silicon/System bring-up, validation, and debug
• Thorough knowledge of high-speed protocols such as CXL, PCIe, NVMe, or Ethernet
• Understanding of x86/ARM architecture and UEFI/Linux boot sequences
• Strong background in bench automation using Python
• Experience with lab equipment including protocol analyzers and in-circuit debuggers

Preferred Qualifications

• Working knowledge of C or C++ for embedded FW and device drivers
• Familiarity with PCIe compliance standards and consortiums
• Knowledge of simulation tools like Keysight ADS or Mathworks QCD
• Working knowledge of SerDes architecture (Tx/Rx equalization, clock recovery, etc.)
• Experience with PAM4 SerDes

About the Company

Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions, integrating CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies.