Digital Logic Design Apprenticeship

Responsibilities

• Collaborate with experienced mixed-signal design and verification teams to develop and verify high-speed NRZ and PAM-based SerDes products
• Engage in dynamic PHY IP development to tackle challenging technological problems
• Participate in initial and ongoing training led by industry experts in advanced digital and analog design methodologies
• Contribute to scripting and automation tasks to support design verification processes

Requirements

• B.E./B.Tech in Electronics, Electrical, Instrumentation, or related fields
• Fresh graduate from the Class of 2026
• Strong digital and analog design aptitude (Mandatory)
• Experience with UVM RNM Verification Methodology
• Good communication skills and a collaborative mindset
• Must not be currently enrolled in M-Tech programs or postgraduate diplomas
• Must not be currently employed in any full-time position

Preferred Qualifications

• Understanding of PLLs, ADCs, DACs, and LDOs
• Knowledge of DSP basics
• Hands-on scripting experience in Perl, Python, Tcl, or shell

About the Company

Synopsys drives technology innovations that shape the way we live and connect. We create high-performance silicon chips that help build a healthier, safer, and more sustainable world, powering the Era of Pervasive Intelligence through smart tech and AI.