Digital IC Backend Design Engineer

About the Company

Arago is an AI and computer hardware company whose mission is to drive the course of history forward by accelerating breakthroughs at the intersection of AI and semiconductors. Founded in 2024, Arago brings together a lean team of engineers and scientists from the world’s top companies and research labs.

Responsibilities

• Execute full-chip and block-level physical design tasks including floorplanning, placement, clock tree synthesis, routing, and physical verification
• Develop and optimize the digital backend flow
• Drive timing closure, power optimization, and physical verification (LVS/DRC/ERC)
• Collaborate with front-end designers to address timing and logical/physical interface issues
• Support tapeout preparation and final signoff processes

Requirements

• Master’s or PhD degree in Electrical/Electronic Engineering or a related field
• 4+ years experience in digital IC backend implementation
• Proficiency with backend EDA tools, particularly Cadence Innovus and Genus
• Strong understanding of place & route (P&R), static timing analysis (STA), DRC/LVS verification, IR drop, and electromigration (EM) analysis
• Experience with advanced technology nodes (22nm or below preferred)
• Skilled in Tcl scripting for automation of backend flows
• Proficient English

Preferred Qualifications

• Experience in hierarchical or full-chip implementation
• Proficiency in French

Benefits

• Competitive cash compensation
• Meaningful stock option plan
• Relocation bonus and moving expense coverage
• Healthcare coverage and pension contributions
• 25 days of PTO plus public holidays
• Professional development support
• 50% reimbursement of public transport subscription fee