Posted 6 hours ago
Digital Design Intern
Mixel
Requirements
Bachelor's degree in Electronics Engineering, Strong knowledge of Verilog RTL design/simulation, Knowledge of clock domain crossing (CDC) and reset domain crossing (RDC) techniques, Knowledge of ASIC/FPGA design flows including RTL Synthesis, Place and Route, and Timing Sign-off, Solid understanding of static timing analysis (STA) and timing constraints (SDC)
Skills
VerilogSystemVerilogASICFPGAUVMSTALinux
About the role
Responsibilities
- Participate in Mixel-Egypt's 3-month internship program and learn from experienced engineers
- Contribute to real digital design engineering projects in a collaborative, innovation-driven environment
- Develop practical skills using industry-leading design methodologies, tools, and workflows
Requirements
- Bachelor's degree in Electronics Engineering
- Strong knowledge of Verilog RTL design and simulation
- Knowledge of clock domain crossing (CDC) and reset domain crossing (RDC) techniques
- Knowledge of ASIC/FPGA design flows including RTL Synthesis, Place and Route, and Timing Sign-off
- Solid understanding of static timing analysis (STA) and timing constraints (SDC)
Preferred Qualifications
- Familiarity with SystemVerilog, UVM, and RTL/gate verification techniques
- Knowledge of Unix/Linux operating systems
- Knowledge of shell scripting and programming languages
About the Company
Mixel, a Silvaco Company, is an innovator of high-performance analog mixed-signal semiconductor IPs. Its solutions power Mobile, Display, Camera, Automotive, VR, AR, and AI applications. The company focuses on technical innovation, people well-being, and creative thinking in a setting with open communication and mutual trust.
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Mixel · Cairo
