DFT Engineer

Responsibilities

• Participate in SOC full chip DFT feature and architecture definition
• Responsible for DFT specification generation and review
• Implement SOC DFT functions including SCAN, Boundary SCAN, MBIST, and Analog Macro test logic
• Perform verification on all DFT structures
• Generate DFT-related timing constraints and collaborate with the PD team for timing closure
• Generate and verify DFT structural and functional patterns
• Participate in ATE bring-up and debug DFT patterns on ATE
• Design and implement other DFX logics such as debug, characterization, and yield

Requirements

• Hands-on working experience in ASIC DFT design and verification
• Familiarity with the entire ASIC design flow
• BS in Electrical Engineering (EE) or Computer Science (CS)
• 3+ years of relevant professional experience
• Strong problem-solving skills

Preferred Qualifications

• Experience with microprocessor design
• Good English communication skills (hearing, speaking, reading, and writing)
• MS degree in a relevant field

About the Company

AMD is on a mission to build great products that accelerate next-generation computing experiences—from AI and data centers to PCs, gaming, and embedded systems. We push the limits of innovation to solve the world’s most important challenges through a culture of collaboration and excellence.