Design Verification - Sr Staff Engineer

Responsibilities

• Perform high-level design verification for complex SOC architectures
• Develop and maintain verification environments using SystemVerilog and UVM/OVM
• Utilize System C and Verilog for hardware modeling and verification tasks
• Execute debugging and analytical processes to ensure design integrity
• Support power-aware verification, Gate Level Simulation (GLS), and test vector generation
• Manage design assets using version control systems like Clearcase or Perforce

Requirements

• Strong knowledge of digital design and SOC architecture
• Proficiency in Hardware Verification Languages (HVL) such as SystemVerilog and UVM/OVM
• Experience with HDL such as Verilog
• Understanding of ARM/DSP CPU architecture and high-speed peripherals (USB, PCIe, Audio/Multimedia)
• Proficiency in scripting languages including Python, Perl, or Tcl
• Strong analytical and debugging skills
• Bachelor's, Master's, or PhD in Computer Science, Electrical/Electronics Engineering, or a related field

Preferred Qualifications

• Experience with Power-aware Verification and Gate Level Simulation (GLS)
• Familiarity with test vector generation techniques
• Experience with version management tools like Clearcase or Perforce

About the Company

Qualcomm is a global leader in wireless technology, developing breakthrough innovations that impact lives around the world. We foster a supportive, inclusive culture where the brightest minds work together to solve the most complex challenges in engineering and technology.