Design Verification Lead

Responsibilities

• Lead the verification of complex PLLs delivered to various AMD SoCs
• Create methodology-based (UVM) verification testbenches and components from scratch
• Develop test plans and perform verification of IP in RTL, Gatesim, and Analog Mixed Signal simulations
• Ensure quality deliverables through rigorous regressions
• Achieve 100% verification completeness using code coverage, functional coverage, and assertions
• Provide technical reviews and feedback to design and architecture teams

Requirements

• 15+ years of experience in design verification
• Expertise in SystemVerilog and UVM methodology-based testbench architectures
• Strong proficiency in System Verilog assertions (SVA)
• Deep understanding of code and functional coverage
• Strong digital design knowledge
• Experience with UPF-based low power RTL verification
• Bachelors or Masters degree in Electronics or Electrical Engineering

Preferred Qualifications

• Prior experience leading a technical team
• Experience with PLL verification and Mixed signal verification methodologies
• Exposure to digital-analog co-simulations (cosims)
• Excellent problem-solving, debugging, and communication skills

About the Company

AMD is a global leader in high-performance computing, graphics, and visualization technologies. Our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers to PCs, gaming, and embedded systems. We strive for execution excellence through a culture of innovation, collaboration, and inclusion.