Design Verification Engineer

Responsibilities

• Serve as the design verification SME for semiconductor deployments across block, subsystem, and SoC environments
• Shape AI-assisted workflows for test generation, regression triage, debug, and coverage closure
• Curate evaluations including golden tasks, labeled examples, and realistic benchmarks
• Build lightweight prototypes, eval harnesses, and tooling to validate opportunities
• Educate and mentor the FDE team on verification concepts and methodology
• Partner with FDEs during customer discovery to translate pain points into technical plans
• Progressively take on broader FDE responsibilities including solution architecture and production deployment

Requirements

• BS/MS in EE, CE, CS, or equivalent
• 5+ years of experience in design verification for complex IP, subsystem, or SoC programs
• Expertise in SystemVerilog, UVM, and simulation/debug tools (VCS, Questa, Verdi)
• Deep understanding of constrained-random verification, scoreboards, and coverage analysis
• Strong knowledge of computer architecture, RTL, and memory systems
• Proficiency in Python or similar scripting languages for automation
• Ability to operate as a consultative expert in customer-facing environments

Preferred Qualifications

• Experience across multiple semiconductor companies or tool stacks
• Familiarity with RTL design, formal verification, or emulation
• Experience applying AI/LLM systems to semiconductor workflows
• Prior experience in customer-facing, solutions engineering, or technical delivery roles

About the Company

OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity.