Defect Reduction Engineer

Responsibilities

• Support defect control and reduction in a high-volume 24x7 manufacturing environment to achieve yield and performance goals.
• Act as the Defect Reduction representative for New Product Introduction (NPI), presenting inspection strategies and evaluating process changes.
• Perform fab process and tool trend data analysis to identify root causes and prevent inline process excursions.
• Work cross-functionally to evaluate defect data on projects, excursion monitoring, and SWLY reduction.
• Establish FCC (Failed Chip Count) and trend monitoring plans for new technology introductions and existing legacy production nodes.
• Support new technology and process transfer projects from Samsung HQ.

Requirements

• Bachelor's degree in Electrical, Chemical, or Mechanical Engineering, Material Science, Chemistry, Physics, or a related technical field.
• 5+ years of semiconductor process engineering experience specifically in defect monitor and reduction.
• Working knowledge of SPC and DOE methodology.

Preferred Qualifications

• Experience in leading logic technology (45nm or below) development.
• Relevant experience in advanced defect inspection and review tools (bright field, dark field, e-beam, Vis-edge, etc.).
• Knowledge of Klarity Defect software or similar applications in a semiconductor environment.

Benefits

• Medical, dental, and vision insurance.
• Life insurance and 401(k) matching with immediate vesting.
• Onsite café(s) and workout facilities.
• Paid maternity and paternity leave.
• Paid time off (PTO) plus personal and regular holidays.
• Wellness incentives and potential MBO bonuses.

About the Company

Samsung Austin Semiconductor is a world leader in advanced semiconductor technology. We are innovating today to power the devices of tomorrow, driven by the belief that the pursuit of excellence creates a better world.