DDR & HBM Validation Engineer

Responsibilities

• Execute validation and bring-up activities for DDR and HBM memory subsystems
• Verify memory bring-up software, firmware and scripts against project requirements
• Debug firmware, hardware and system-level issues and contribute to root-cause analysis
• Perform PHY characterization and analog-level analysis during stress testing
• Develop Python-based automation, test infrastructure and reporting tools
• Perform signal integrity, voltage, frequency and timing measurements using laboratory instrumentation
• Characterize memory bandwidth, latency, training behaviour and subsystem stability

Requirements

• Strong experience validating DDR, LPDDR, HBM or related DRAM technologies
• Deep understanding of DRAM architecture and memory controller functionality
• Experience with firmware, BIOS and Embedded C development
• Strong programming skills in C and Python
• Hands-on experience using laboratory equipment including oscilloscopes
• Experience interfacing with low-speed peripherals like GPIO, SPI, I2C and UART
• Experience with board bring-up and hardware validation activities
• Experience performing silicon characterization and analysing validation results

Preferred Qualifications

• Experience with DDR or HBM PHY behaviour and training algorithms
• Knowledge of memory subsystem performance analysis and workload characterization
• Familiarity with JTAG, trace infrastructure and low-level debug tools
• Experience with high-performance compute, AI accelerator or data center systems
• Understanding of signal integrity and power integrity in high-speed memory systems

About the Company

The Memory Validation team is responsible for the bring-up, validation, characterization and debug of memory subsystems across Graphcore silicon and platform products.