CPU Physical Design Engineer

Responsibilities

• Plan, design, optimize, verify, and test high-speed core electronic systems and circuits
• Lead block-level or chip-level Physical Design, STA, and PDN activities
• Execute RTL to GDSII implementation independently
• Collaborate with cross-functional teams to resolve issues regarding constraints validation, verification, and STA
• Manage technical deliveries with a small team of engineers
• Address deep sub-micron design challenges including leakage power, signal integrity, and DFM

Requirements

• Bachelor's, Master's, or PhD in Computer Science, Electrical/Electronics Engineering, or a related field
• 7-14 years of experience in Physical Design and timing signoff for high-speed cores
• Proven experience in high-frequency design convergence with PPA targets and PDN methodology
• Strong knowledge of low power flow (power gating, multi-Vt flow, power supply management, etc.)
• Proficiency in Tcl or Perl scripting
• Strong problem-solving skills and circuit-level comprehension of time-critical paths

About the Company

Qualcomm is a leading technology innovator that pushes the boundaries of what's possible to enable next-generation experiences and drive digital transformation for a smarter, connected future.