Associate Engineer, DEG Layout

Responsibilities

• Design and develop critical analog, mixed-signal, and custom digital blocks, including full chip level integration support.
• Perform layout verification tasks such as LVS, DRC, and Antenna checks, ensuring high quality and thorough documentation.
• Ensure on-time delivery of block-level layouts while maintaining acceptable quality standards.
• Manage project planning, including area/time estimation, scheduling, and execution within a multi-project environment.
• Collaborate and communicate effectively with global engineering teams to ensure project success.

Requirements

• 1 to 3 years of experience in analog or custom layout design using advanced CMOS processes (Planar, FinFET).
• Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS.
• Hands-on experience creating layouts for critical blocks such as PLL, ADC, DAC, LDO, Bandgap, Temperature sensors, or Current Mirrors.
• Strong understanding of analog layout fundamentals, including matching, electro-migration, latch-up, coupling, crosstalk, and IR-drop.
• BE or MTech in Electronic or VLSI Engineering.
• Excellent problem-solving skills regarding physical verification of custom layouts.

Preferred Qualifications

• Experience supporting multiple tape-outs.
• Proactive approach to exploring and implementing AI-related tools in daily tasks.
• Understanding of design hierarchy and different architectures for memory designs.

About the Company

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence. We develop groundbreaking technologies, including high-performance DRAM, NAND, and NOR memory, to fuel the data economy and enable advances in artificial intelligence and 5G applications.