ASIC Engineer

Responsibilities

• Design and implement digital and/or mixed-signal ASIC blocks from specification to tapeout
• Develop RTL (Verilog/SystemVerilog) and/or transistor-level designs
• Collaborate with RFIC, analog, and system engineers to integrate digital logic within RF and mixed-signal chip architectures
• Perform synthesis, timing closure, and power optimization
• Work with verification engineers to define testbenches and ensure robust design validation
• Support functional verification and debugging of ASIC components
• Assist with synthesis, timing analysis, and physical implementation activities
• Contribute to silicon bring-up, debugging, and post-silicon validation activities
• Document design architecture, implementation details, and verification results

Requirements

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related discipline
• 1-3 years of experience in ASIC design
• Strong experience with RTL design (Verilog/SystemVerilog) or analog/mixed-signal IC design
• Solid understanding of digital design fundamentals (timing, clocking, power)
• Experience with ASIC tool flows (Synopsys, Cadence, or similar)
• Familiarity with verification methodologies
• Ability to work full-time onsite in Atlanta, GA

Preferred Qualifications

• Expertise in clock domain crossing, timing optimization, and low-power design
• Hands-on experience with HDL simulators, linting tools, and FPGA platforms
• Proficiency in Python or TCL for design automation

Benefits

• Competitive Salary and Equity Package
• Comprehensive Health, Dental, and Vision Insurance
• 401(k) Retirement Plan
• Paid Time Off (PTO) and Sick Leave