Architect/Staff Hardware Integration Engineer

About the Company

OLIX is building the next generation of AI infrastructure. The OLIX Decode Accelerator 1 (DX-1) is a rack-scale co-designed system of logic, data movement, packaging, optics, and interconnect designed to solve the massive infrastructure gap in the AI industry.

Responsibilities

• Own the technical direction and architectural decisions for the hardware-software integration team
• Translate high-level priorities into concrete execution plans and technical roadmaps
• Define principles, interface contracts, and standards for firmware, ASIC validation, and interconnect fabric
• Lead technical decision-making across BSP, firmware architecture, BMC platform design, and interconnect integration
• Drive alignment across engineering teams through rigorous technical documentation and clarity
• Manage the full lifecycle from pre-silicon emulation and bring-up to post-silicon and sustainment
• Mentor and raise the technical bar of the engineering team through design feedback and code reviews

Requirements

• Deep expertise in firmware and hardware-software co-development (ASIC bring-up, BMC/OpenBMC, or high-speed SerDes/photonic interconnect)
• Expertise in embedded Linux BSP including Yocto/OpenEmbedded, U-Boot/UEFI, and device driver development
• Proficiency with server management protocols (IPMI, Redfish, MCTP, PLDM) and low-speed peripherals (I2C, SPI, UART)
• Proven track record of delivering complex hardware-software integration architecture in large organizations
• Experience with high-reliability environments, observability, and incident management
• Outstanding technical communication skills for writing design documents and articulating architecture to leadership

Preferred Qualifications

• Experience with cycle-deterministic or precision timing systems such as IEEE 1588, PTP, SyncE, or White Rabbit Protocol