
Posted 18 hours ago
Architect - FPGA Design, AXI/UCIe Protocol
Synopsys
Requirements
12+ years relevant experience, Bachelor's or Master's in Electrical or Computer Engineering, Deep experience with UCIe, PCIe, CXL, or AXI, Strong RTL development skills, Experience with FPGA platforms, System-level validation and emulation experience, Understanding of high-speed serial interfaces
Skills
FPGARTLPCIeCXLAXI
About the role
Responsibilities
- Design and develop Speed Adapter solutions for PCIe Gen5/Gen6, CXL 2.0/3.x, UCIe, and AXI protocols
- Implement protocol logic and speed adaptation functionality on FPGA-based platforms to bridge multi-gigabit interfaces with reduced-speed DUTs
- Develop and debug RTL, firmware, and system-level components across the full Speed Adapter stack
- Collaborate with IP, emulation, and prototyping teams to deliver integrated system-level validation solutions
- Build reference designs, example flows, and integration documentation for customer deployment
- Support customer escalations by performing root-cause analysis across hardware, firmware, and protocol layers
- Contribute to roadmap planning and feature definition for next-generation Speed Adapter products
Requirements
- 12+ years of relevant experience in digital design and FPGA-based systems
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or equivalent hands-on experience
- Deep hands-on experience with at least two of the following: UCIe, PCIe (Gen4 or later), CXL (2.0 or later), or AXI
- Strong RTL development skills with experience designing and deploying logic on FPGA platforms
- Experience with system-level validation, emulation, or prototyping environments
- Solid understanding of high-speed serial interfaces, including transceiver configuration and link training
- Demonstrated ability to debug across RTL, firmware, and board-level hardware using waveform viewers and protocol analyzers
Preferred Qualifications
- Experience with ZeBu, HAPS, Veloce, or Palladium emulation/protyping platforms
- Familiarity with In-Circuit Emulation or Direct-ICE workflows
Benefits
- Comprehensive medical and healthcare plans
- Paid Time Off (ETO and FTO programs) plus company holidays
- Family support including maternity/paternity leave and adoption assistance
- Employee Stock Purchase Plan (ESPP) with a 15% discount
- Competitive salary and eligibility for annual bonuses and equity
About the Company
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation, and analysis solutions to power the next generation of semiconductor innovation.
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Get started — it's freeArchitect - FPGA Design, AXI/UCIe Protocol
Synopsys · Sunnyvale
