Application Engineering, Sr Staff Engineer - Runset Development

Responsibilities

• Developing and validating DRC, LVS, and Fill runsets for the Synopsys IC Validator tool
• Collaborating with foundries to deliver high-quality PV runsets for advanced nodes
• Automating qualification processes using Perl, Tcl, and Python
• Troubleshooting complex layout verification issues including LVS discrepancies and DRC violations
• Interfacing with customers and FAEs to gather requirements and provide technical support
• Mentoring junior team members and sharing best practices

Requirements

• B.Tech, M.Tech, or MS in Electronics, VLSI, or a related field
• 8-10 years of hands-on experience in the Physical Verification (PV) domain
• Advanced proficiency with EDA tools such as IC Validator, Calibre, Pegasus, and PVS
• Strong scripting skills in Perl, Tcl, and Python
• Deep understanding of CMOS layout, ASIC design flows, and foundry process requirements
• Experience writing and debugging DRC, LVS, ERC, and DFM rule decks

Preferred Qualifications

• Exposure to competitive EDA tools and awareness of their strengths and limitations
• Analytical thinking and meticulous attention to detail
• Strong communication skills for technical concept translation

Benefits

• Comprehensive medical and healthcare plans
• ETO and FTO programs
• Maternity and paternity leave
• ESPP with 15% discount
• Retirement plans
• Annual bonus and equity eligibility