Analog IC Design and Verification Engineer at Neuralink - ScoutJobs - The AI-curated global job board
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Posted 18 hours ago

Analog IC Design and Verification Engineer

NeuralinkAnalog IC Design and Verification Engineer

Perks & benefits

Medical InsurancePaid LeaveCommissionMobile AllowanceHealth Insurance

Requirements

BS degree in related field, 5+ years technical experience, 5+ years analog/mixed-signal CMOS design, Silicon validation track record

Skills

Analog IC DesignCMOSMixed-Signal

About the role

About the Company

Neuralink is creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world.

Responsibilities

  • Design analog circuit building blocks and subsystems in transistor-level to achieve challenging noise, mismatch, distortion, power consumption, and cost requirements
  • Oversee block-level layout of multiple blocks in collaboration with layout teams
  • Plan and execute analog verification plans for IP or chip portions
  • Run complex simulations and analyses including power, performance, linearity, and yield
  • Design, program, and review complex tests and ensure bugs are identified and analyzed
  • Consult with internal/external users and third-party vendors to guide implementation

Requirements

  • Bachelor of Science degree with at least 5 years of related technical experience
  • Minimum 5 years of experience in analog/mixed-signal integrated CMOS circuit design
  • Proven track record of silicon validation in areas such as ADC, DAC, VCO, PLL, DLL, Audio CODEC, or high speed PHY & SERDES

Preferred Qualifications

  • Masters or PhD in electrical engineering, physics, or related fields
  • Experience with design for high-volume production
  • Experience in lab testing of high-precision analog and mixed-signal ICs
  • Functional modeling and logic verification experience with Verilog AMS and SystemVerilog
  • Experience in design and layout with advanced CMOS FinFET technologies
  • Skills in scripting and automation for complex simulation scenarios

Benefits

  • Equity (RSUs)
  • Medical, dental, and vision insurance (PPO plan)
  • 401(k) plan
  • Paid holidays and flexible time off
  • Commuter benefits and provided meals
  • Parental leave
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Analog IC Design and Verification Engineer

Neuralink · Fremont

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