3D Physical Design Engineer

Responsibilities

• Work on the design and analysis of 3D integrated products, including wafer-scale architecture and advanced packaging
• Perform a combination of traditional ASIC/SoC physical design, packaging, power, clock, and cooling analysis
• Collaborate closely with architecture and RTL teams to conduct R&D on novel 3D integration concepts
• Optimize designs for power, performance, and area (PPA)
• Resolve block and full-chip DRC and LVS issues using ICV or Calibre tools
• Perform IR/EM analysis and implement effective resolutions

Requirements

• 10+ years of physical design and verification experience
• Strong knowledge of block-level and full-chip physical verification methodology
• Experience with the complete physical design flow and Synopsys tool suite
• Expertise with ICV or Calibre tools
• Proficiency in scripting languages such as Tcl and Python for flow enhancements
• Proven experience with 3D physical design, including 3D die stacking, 3D chip design, die-to-die, or wafer-to-wafer integration
• Knowledge of 2.5D or 3D packaging solutions

Preferred Qualifications

• Experience performing full chip floor planning and integration
• Knowledge of clock distribution methodologies
• Experience with cooling analysis

About the Company

Cerebras Systems builds the world's largest AI chip, utilizing a novel wafer-scale architecture that provides the compute power of dozens of GPUs on a single chip. Our technology delivers industry-leading training and inference speeds, empowering users to run large-scale machine learning applications with unprecedented efficiency.